Agentrys has raised $24.5 million to expand development of its AI-based chip design automation platform and customer programs across verification and physical design. The funding includes an oversubscribed $19.1 million seed round led by Etna Labs, following a $5.4 million pre-seed round led by MediaTek, the company’s first strategic backer. Agentrys plans to use the new capital for recruiting, agent-native tooling and expansion of customer engagements. Rather than target a single EDA task, Agentrys is developing what it calls Agentic Design Automation, or ADA, an approach designed to automate and improve complete semiconductor engineering workflows. The company’s platform allows design teams to build and retain their own AI agent systems across commercial EDA tools, internal tools and existing design infrastructure instead of relying exclusively on a fixed set of vendor-controlled agents.
Founder and CEO Mark Ren brings more than 25 years of EDA and AI research experience spanning NVIDIA Research and IBM Research. Before founding Agentrys, Ren led NVIDIA Research’s Design Automation group, where his work focused on AI for EDA and GPU-accelerated design automation. His NVIDIA research also included ChipNeMo, a domain-adapted large language model initiative developed specifically for industrial chip design applications.
Agentrys is developing AI-based chip design automation technologies for semiconductor verification, physical design and broader EDA workflows. (Image courtesy of Agentrys)
“Building production-grade agents that reliably automate real engineering work is far from easy—that’s the problem Agentrys exists to solve. We help engineering teams turn manual workflows into an agentic workforce that designs chips faster, delivers better results, and systematically improves in capability over time. That’s the difference between renting capability everyone else can rent and building an asset that compounds for you alone.”
Agentrys is also focusing on how engineering knowledge generated during real design workflows can improve subsequent agent performance. Its platform combines AI agents with design intelligence, agent-native tools and custom models, while allowing semiconductor companies to maintain control of their internal methodologies, design data and engineering knowledge.
The company reports that it has demonstrated an autonomous multi-agent workflow capable of taking a 32-bit CPU from specification through sign-off-clean GDS layout without human intervention. In separately published testing on four RTL coding task categories from the public Comprehensive Verilog Design Problems benchmark, Agentrys reported a 95.8% overall pass rate for its sixth-generation agent system, compared with 88.9% for the specialized ACE-RTL baseline used in its evaluation. The company also reported progressive performance improvements as the agent architecture evolved across successive generations.
Agentrys is currently working with customers across full digital and analog design flows and reports engagements with fabless semiconductor companies, a global foundry and chip startups. Verification and physical design remain immediate areas of expansion, with system-level design included on the company’s longer-term development roadmap.
The new funding will support additional hiring and continued development of agent-native engineering tools as Agentrys expands its customer programs. For semiconductor design teams, the broader question is increasingly moving beyond whether AI can automate individual design tasks and toward how those systems can operate across longer engineering workflows while preserving existing EDA infrastructure, proprietary methodologies and accumulated design knowledge.
About Agentrys
Agentrys is a San Jose, California-headquartered applied research and engineering company developing AI-based design automation technologies for the semiconductor industry. Its Agentic Design Automation platform combines AI agents, design intelligence, agent-native tools and custom models to automate and improve chip-design workflows across existing commercial EDA tools, internal design environments and customer infrastructure. The company maintains operations in San Jose, Austin and Taiwan, with a technical team whose experience spans AI for chip design, EDA, LLM systems, physical design and semiconductor infrastructure. For more information, please click here.
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Molly Bakewell Chamberlin is the Founder, Publisher and Editor-in-Chief of Components Source Network, a 100% woman- and disability-owned B2B publishing and expert marketplace platform serving the global high-tech manufacturing and engineering community. She is the architect, author and developer of the Network’s 11 specialized e-news sites and 11 peer-vetted expert e-marketplaces, including Semiconductor Industry Monthly. With more than 25 years of experience in strategic technical marketing, public relations and business development, she is also the Founder and President of Embassy Global, LLC, which has supported more than 200 high-tech industry brands worldwide since 2008. Molly also serves pro bono as Second Vice Chair of the Government Team for the WBENC Forum and is a long-standing advocate for small business, supplier diversity, sustainability and women in STEM. Connect with Molly on LinkedIn.
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